Everspin achieves data center OEM qualification of its 1Gb STT-MRAM offering; announces production shipments

Everspin Technologies announced on Wednesday that it has secured the qualification notice from a major server OEM of its 1-Gigabit (Gb) Spin-transfer Torque Magnetoresistive Random Access Memory (STT-MRAM) device. This qualification notice affirms the quality, performance and specifications of the 1Gb device and enables its use in the production of products for this customer. 

The STT-MRAM provides a significant reduction in switching energy compared to Toggle MRAM, and is highly scalable, enabling higher density memory products. Everspin’s third generation of MRAM technology uses a Perpendicular MTJ, and has developed materials and Perpendicular MTJ stack designs with high perpendicular magnetic anisotropy, which provides long data retention, small cell size, greater density, high endurance and low power.

The 1Gb is the newest generation of STT-MRAM, utilizing ST-DDR4 which is a JEDEC-like DDR4 interface with some modifications needed to take advantage of the persistence from MRAM technology. These products perform like a persistent DRAM but with no refresh required. Additional products are planned which will utilize high speed serial interfaces for a range of embedded applications.

Earlier this summer, Everspin announced pilot manufacturing of its 28 nm 1Gb device and is now qualified to make production shipments to its first qualifying customer. 

No other manufacturer has achieved production of any discrete STT-MRAM device, a further testament to Everspin’s position in the field having achieved production of its 256Mb STT-MRAM in 2017. To date, Everspin has produced more than 120 million units of its Toggle and STT-MRAM devices.

Everspin’s STT-MRAM devices allow enterprise infrastructure and data center providers to increase the reliability and performance of systems where low latency data persistence is critical. This is achieved by delivering protection against power loss and allowing storage OEMs to significantly improve quality of service of their products. 

Similar benefits can also be achieved using the 1Gb STT-MRAM device as a persistent data write buffer in storage and fabric accelerators, computational storage, and other applications.

The data center OEM name is not being disclosed as they have not yet announced their end product(s).

“We continue to make great strides in the commercialization of MRAM across many market segments, including the data center,” said Kevin Conley, president and CEO of Everspin. “It is very rewarding to see the completion of this very important customer milestone with our 1Gb STT-MRAM, along with the collaboration that has taken place with our customers and our ecosystem partners.”

Rambus achieves GDDR6 performance at 18 Gbps; aimed at AI, ML, data center, autonomous driving systems that need higher bandwidth memory

Rambus Inc. announced it has achieved 18 Gbps performance with the Rambus GDDR6 Memory PHY. Running at the industry’s fastest data rate of 18 Gbps, the Rambus GDDR6 PHY IP delivers peak performance four-to-five times faster than current DDR4 solutions and continues the company’s longstanding tradition of developing leading-edge products. 

The Rambus GDDR6 PHY pairs with the companion GDDR6 memory controller from the recent acquisition of Northwest Logic to provide a complete and optimized memory subsystem solution.

Increased data usage in applications such as artificial intelligence, machine learning, data center, networking and automotive systems is driving a need for higher bandwidth memory. The coming introduction of high-bandwidth 5G networks will exacerbate this challenge. 

Working closely with memory partners, the Rambus GDDR6 solution gives system designers more options in selecting the memory system that meets both their bandwidth and cost requirements.

Rambus GDDR6 PHY achieves high speed of up to 18 Gbps, delivering a maximum bandwidth of up to 72 GB/s; complete and optimized memory subsystem solution with companion GDDR6 memory controller; offers PCB and package design support – allowing customers to bring their high-speed designs to production; and provides access to Rambus system and SI/PI experts helping ASIC designers to ensure maximized signal and power integrity for devices and systems.

It also features LabStation development environment that enables quick system bring-up, characterization and debug, and supports high-performance applications including networking, data center, ADAS, machine learning and AI.

The Rambus GDDR6 PHY will be fully compliant to the JEDEC GDDR6 (JESD250) standard, supporting up to 16 Gbps per pin, and is available on TSMC 7nm process. The GDDR6 interface supports 2 channels, each with 16 bits for a total data width of 32 bits. 

With speeds up to 16 Gbps per pin, the Rambus GDDR6 PHY will offer a maximum bandwidth of up to 64 GB/s. This PHY will be available in advanced FinFET nodes for leading-edge customer integration. The Rambus system-aware design methodology used for IP Cores delivers a customer focused experience with improved time-to-market and first-time-right quality. 

Rambus offers flexible delivery of IP cores and will work directly with the customer to provide a full system signal and power integrity analysis, creating an optimized chip layout. In the end, the customer receives a hard macro solution with a full suite of test software for quick turn-on, characterization and debug.