Intel releases tiny EMIB that assist chips to ‘talk’ with each other

Intel unveiled its Embedded Multi-die Interconnect Bridge (EMIBs) chips that speed the flow of data inside nearly 1 million laptops and field programmable gate array devices worldwide. That number will soon soar and include more products as EMIB technology enters the mainstream. 

EMIB is a cost-effective approach to in-package high density interconnect of heterogeneous chips. It delivers a complex multi-layered sliver of silicon no bigger than a grain of rice, and lets chips fling enormous quantities of data back and forth among adjoining chips at blinding speeds: several gigabytes per second.

The industry refers to this application as 2.5D package integration. Instead of using a large silicon interposer typically found in other 2.5D approaches, EMIB uses a very small bridge die, with multiple routing layers. This bridge die is embedded as part of the substrate fabrication process.

For example, Intel’s Ponte Vecchio processor, a general-purpose GPU the company unveiled this month, contains EMIB silicon.

To meet customers’ unique needs, this innovative technology allows chip architects to cobble together specialized chips faster than ever. And compared with an older, competing design called an interposer — in which chips inside a package sit atop what is essentially a single electronic baseboard, with each chip plugged into it — tiny, flexible, cost-effective EMIB silicon offers an 85 percent increase in bandwidth. That can make tech — laptop, server, 5G processor, graphics card— run faster, and next-generation EMIB could double or even triple that bandwidth.

The silicon interposer in a typical 2.5D package is a piece of silicon larger-than-all interconnecting die. In contrast, the silicon bridge is a small piece of silicon embedded only under the edges of two interconnecting die. This allows for most size die to be attached in multiple dimensions, eliminating additional physical constraints on heterogeneous die attachment within the theoretical limits.

The image shows a difficult yet desirable layout. The industry standard 2.5D solution cannot accommodate this, as the silicon interposer cannot be produced large enough to connect all the die. Yet EMIB allows for the flexibility in this die placement, allowing scaling in both dimensions.

Intel debuts GPU architecture with HPC and AI acceleration, and oneAPI software stack for heterogeneous architectures

Intel unveiled its vision for extending its leadership in the convergence of high-performance computing (HPC) and artificial intelligence (AI) with additions to its data-centric silicon portfolio and an ambitious new software initiative that represents a paradigm shift from single-architecture, single-vendor programming models.

Addressing the increasing use of heterogeneous architectures in high-performance computing, Intel expanded on its existing technology portfolio to move, store and process data more effectively by announcing a new category of discrete general-purpose GPUs optimized for AI and HPC convergence. 

Intel also launched the oneAPI industry initiative to deliver a unified and simplified programming model for application development across heterogenous processing architectures, including CPUs, GPUs, FPGAs and other accelerators. The launch of oneAPI represents millions of Intel engineering hours in software development and marks a game-changing evolution from limiting, proprietary programming approaches to an open standards-based model for cross-architecture developer engagement and innovation.

The oneAPI initiative Intel launched will define programming for an increasingly AI-infused, multi-architecture world. oneAPI delivers a unified and open programming experience to developers on the architecture of their choice without compromising performance and eliminating the complexity of separate code bases, multiple-programming languages, and different tools and workflows. oneAPI preserves existing software investments with support for existing languages, while delivering flexibility for developers to create versatile applications.

oneAPI includes both an industry initiative based on open specifications and an Intel beta product. The oneAPI specification includes a direct programming language, APIs and a low-level hardware interface. Intel’s oneAPI beta software provides developers a comprehensive portfolio of developer tools that include compilers, libraries and analyzers, packaged into domain-focused toolkits. 

The initial oneAPI beta release targets Intel Xeon scalable processors, Intel Core processors with integrated graphics, and Intel FPGAs, with additional hardware support to follow in future releases.

BittWare, Achronix introduce enterprise-class PCIe accelerator product featuring 7nm Speedster7t FPGA

BittWare, a Molex company, has collaborated with Achronix Semiconductor to introduce the S7t-VG6 PCIe accelerator product—a feature-rich PCIe card sporting the new Achronix 7nm Speedster7t FPGA. 

This next generation product offers a range of breakthrough capabilities including low-cost and highly flexible GDDR6 memories that offer HBM-class memory bandwidth, high-performance machine learning processors and a revolutionary 2D network-on-chip for high bandwidth and energy-efficient data movement.

The S7t-VG6 offers a 7nm Achronix FPGA that is optimized for high-speed networking and fast, high-capacity memory access. Featuring a QSFP-DD (double-density) cage, the board supports up to 1x 400GbE or 4x 100GbE using the 56G PAM4-enabled Speedster 7t device. 

An additional QSFP port supports 2x 100GbE, and a 4x OCuLink connector supports NVMe attached storage. Sixteen channels of GDDR6 graphics DRAM handle high-bandwidth memory requirements, providing up to 512GB/s.

The BittWare VectorPath accelerator card is designed for high-performance and high-bandwidth data applications and features 1x400GbE and 2x100GbE interfaces; 8 banks of GDDR6 memory with 4 Tbps aggregate bandwidth; 20 Tbps 2D Network-on-Chip (NoC); 1 bank of DDR4 running at 2666MHz with ECC; PCIe compliance and certification; and 692K 6-input LUTs.

This enterprise-class product leverages BittWare’s extensive experience designing, qualifying, deploying and supporting accelerator cards. Its features include choice of thermal cooling options: passive, active or liquid; comprehensive Board Management Controller (BMC); support for Linux and Windows operating systems; developer toolkit: API, PCIe drivers, application example designs and diagnostic self-test; and option to purchase the S7t pre-integrated as a DELL or HPE server from BittWare TeraBox range.

The initial S7t-VG6 shipments are scheduled to begin by the second quarter of next year.