Intel releases tiny EMIB that assist chips to ‘talk’ with each other

Intel unveiled its Embedded Multi-die Interconnect Bridge (EMIBs) chips that speed the flow of data inside nearly 1 million laptops and field programmable gate array devices worldwide. That number will soon soar and include more products as EMIB technology enters the mainstream. 

EMIB is a cost-effective approach to in-package high density interconnect of heterogeneous chips. It delivers a complex multi-layered sliver of silicon no bigger than a grain of rice, and lets chips fling enormous quantities of data back and forth among adjoining chips at blinding speeds: several gigabytes per second.

The industry refers to this application as 2.5D package integration. Instead of using a large silicon interposer typically found in other 2.5D approaches, EMIB uses a very small bridge die, with multiple routing layers. This bridge die is embedded as part of the substrate fabrication process.

For example, Intel’s Ponte Vecchio processor, a general-purpose GPU the company unveiled this month, contains EMIB silicon.

To meet customers’ unique needs, this innovative technology allows chip architects to cobble together specialized chips faster than ever. And compared with an older, competing design called an interposer — in which chips inside a package sit atop what is essentially a single electronic baseboard, with each chip plugged into it — tiny, flexible, cost-effective EMIB silicon offers an 85 percent increase in bandwidth. That can make tech — laptop, server, 5G processor, graphics card— run faster, and next-generation EMIB could double or even triple that bandwidth.

The silicon interposer in a typical 2.5D package is a piece of silicon larger-than-all interconnecting die. In contrast, the silicon bridge is a small piece of silicon embedded only under the edges of two interconnecting die. This allows for most size die to be attached in multiple dimensions, eliminating additional physical constraints on heterogeneous die attachment within the theoretical limits.

The image shows a difficult yet desirable layout. The industry standard 2.5D solution cannot accommodate this, as the silicon interposer cannot be produced large enough to connect all the die. Yet EMIB allows for the flexibility in this die placement, allowing scaling in both dimensions.