Wind River announces RISC-V support for VxWorks RTOS

Wind River announced this week RISC-V open architecture support for its VxWorks real-time operating system (RTOS), which is a widely deployed commercial RTOS to have support for the RISC-V open hardware instruction set architecture (ISA). 

The company has also joined the RISC-V Foundation, a non-profit consortium chartered to standardize, protect, and promote RISC-V ISA together with its hardware and software ecosystem for use in all computing devices.

VxWorks is a deterministic, high-performance RTOS that sets the standard for a scalable, future-proof, secure, safe, and reliable operating environment for mission-critical devices and systems that must meet the highest standards.

VxWorks is ideal for hard real-time embedded applications because it is a deterministic, priority-based, preemptive RTOS with low latency and minimal jitter. In addition to standard preemption, VxWorks can ensure that safety- and time-critical applications get a predetermined number of CPU cycles through various forms of scheduling as well as time and space partitioning. It also provides flexible features needed for various industries. 

As new features and functionality are added to VxWorks, compatibility is always top of mind because Wind River strives to protect and future proof its customers’ software and tool investments. Compatibility allows developers to take advantage of the latest VxWorks innovation, enabling them to add new features and upgrades with minimal retesting of the entire system, thereby saving both project time and expense.

VxWorks has IPv4 and IPv6 stacks that are also time-sensitive networking (TSN) capable, guaranteeing real-time communications and packet delivery within a bounded time or latency on a switched Ethernet network. VxWorks supports industrial applications, including but not limited to OPC Unified Architecture (OPC UA); SocketCAN used in automotive applications; and host, target, and on-the-go (OTG) USB.

VxWorks supports 32- and 64-bit, as well as multi-core processors including Intel, Arm and Power Architecture. Its comprehensive multi-core processor support allows OS configurations for asymmetric multiprocessing (AMP) and for symmetric multiprocessing (SMP) with CPU affinity for bound multiprocessing (BMP). 

Adding RISC-V support for VxWorks comes on the heels of the recent wave of innovations made to the RTOS, making it the first to include support for C++17, Boost, Python, and the Rust collection of technologies.

“We are pleased to welcome Wind River into the RISC-V Foundation and our global ecosystem," said Calista Redmond, CEO of the RISC-V Foundation. “VxWorks significantly extends the reach of RISC-V in the embedded developer space. We look forward to continued software developments by Wind River and the RISC-V community.”

“It’s exciting to see RISC-V gain significant industry traction as it brings the dynamism of open architecture development to hardware,” said Michel Genard, vice president of product at Wind River. “Wind River is very pleased to continue innovating VxWorks while contributing to the success of RISC-V with collaborations like the ones we have with SiFive and MicroChip providing support for their Unleashed and PolarFire SoC FPGA boards.”

“Having VxWorks support for our RISC-V-based PolarFire SoC FPGA family brings an extremely compelling offering to embedded systems designers who increasingly need real-time, and Linux capable solutions that are low power, thermally efficient, and secure,” said Shakeel Peera, associate vice president, marketing, FPGA business unit at Microchip. “Our partnership with Wind River is an important one as we work together to advance the collaborative RISC-V ecosystem and community.”

“The adoption of RISC-V by Wind River in VxWorks is a great step in the ongoing enablement of the RISC-V ecosystem,” said Dr. Naveed Sherwani, president and CEO of SiFive. “The ability to run VxWorks on SiFive Core IP and devices will enable new application markets across the world.”

ATP A600Si/A600Sc SATA SSDs deliver MCU design for enhanced power management and PLP capabilities

ATP Electronics unveiled Tuesday its next-generation A600Si and A600Sc Serial ATA solid state drives (SATA SSDs) featuring a completely new design of the power loss protection (PLP) array, which utilizes a new power management IC (PMIC) and new firmware-programmable MCU (microcontroller unit). 

Integrated into its latest PLP technology, ATP PowerProtector 4, the new MCU design allows the PLP array to perform intelligently in various temperatures, power glitches and charge states.

ATP SATA SSDs with the new PowerProtector 4 MCU-based design provide enhanced device protection that suppresses power-up inrush current according to customer request and input over-voltage protection to prevent damage to the SSD circuitry. It delivers improved data integrity using input power noise de-glitch to prevent incorrect cache flushing caused by false triggers such as noisy or unstable host input voltage, and under-charge/over-charge protection for hold-up power capacitors.

It also provides fast power on/off control that cuts time required from power-off to re-power on the SSD;  precise control of reset signal generation and power up/down sequences prevents potential issues in the power up/down of the SSD; and industrial operating temperature support ensures reliable operation in extreme environments from ‑40°C to 85°C. 

As components perform and react differently in severely cold or hot scenarios, ATP PowerProtector 4 ensures reliable PLP capacitance in all states of cold start, hot temperature workload, and cross temperature.

With this line of SSDs, users get access to RAID support that ensures redundancy and fault tolerance to prevent data loss in the event of a drive failure; end-to-end data protection prevents unauthorized access to data while it is being transferred from one storage device to another; and customization options, as the new MCU-based design allows PLP capabilities to be tailor-fitted according to unique customer requirements, application-specific needs, or use cases.

"Superior power loss protection is essential in any embedded/industrial application. But not all PLPs are equal," said Marco Mezger, ATP vice president of global marketing. "By implementing this type of MCU design, we are able to showcase our engineering expertise and nearly 30-year experience in the design and manufacture of storage devices for wide temperature environments, particularly for compact form factors in embedded/industrial applications. We continue to blaze the trail, as we were also the first to design and release smaller form factor SSDs such as eUSB and M.2 2242 with an onboard PLP array."

The next-generation ATP SATA SSDs with the new MCU-based design include mSATA, 2.5-inch SSDs and M.2 2242/2280 modules. Available with I-Temp (A600Si) and C-Temp (A600Sc) support, the SSDs come in the following capacities — M.2 2280: 120 to 960 GB; M.2 2242 and mSATA: 120 to 480 GB; 2.5": 120 GB to 1.92 TB.

Guardonix USB3.0 Writeblocker assists forensic examiners to capture lost evidence from damaged/degraded data storage devices

A new device from DeepSpar Data Recovery Systems is making it possible for digital forensic examiners to capture lost evidence from malfunctioning hard drives (HDDs), solid state drives (SSDs), and other data storage devices.

To perform forensic analysis, storage devices are commonly connected to a forensic workstation through the USB interface. A writeblocker is required to ensure that evidence is not altered during analysis. 

A unique advantage of Guardonix is that in addition to writeblocking, it also stabilizes the USB connection – if a storage device is malfunctioning and intermittently goes offline, Guardonix hardware handles the issue, allowing data acquisition to succeed.